218 search results - page 4 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
GECCO
2004
Springer
14 years 1 months ago
2004
Springer
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
MICRO
2008
IEEE
14 years 2 months ago
2008
IEEE
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
CF
2004
ACM
14 years 1 months ago
2004
ACM
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...
JAR
2006
13 years 7 months ago
2006
We describe an approach to verifying bit-level pipelined machine models using a combination of deductive reasoning and decision procedures. While theorem proving systems such as AC...
DAC
1994
ACM
13 years 12 months ago
1994
ACM
-- In this paper, a tool to aid pipelined processor instruction set implementation is described. The purpose of the tool is to choose from among design alternatives a design that m...