1381 search results - page 14 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
DAC
2002
ACM
14 years 9 months ago
2002
ACM
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...
ISCAS
1999
IEEE
14 years 8 days ago
1999
IEEE
ARC
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Most hardware/software codesigns of Elliptic Curve Cryptography only have one central control unit, typically a 32 bit or 8 bit processor core. With the ability of integr...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-on-a-chip (SoC) design. Based on the proposed design methodology, the reconfigu...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...