1381 search results - page 53 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
PDP
2010
IEEE
14 years 3 months ago
2010
IEEE
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
CSREAESA
2004
13 years 9 months ago
2004
Adders are some of the most critical data path circuits requiring considerable design effort in order to "squeeze" out as much performance gain as possible. Many adder d...
VLDB
2007
ACM
14 years 2 months ago
2007
ACM
In this paper we describe the design and implementation of CellSort − a high performance distributed sort algorithm for the Cell processor. We design CellSort as a distributed b...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
Three-Dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. Prior work has looked at the performance,...
HOTNETS
2010
13 years 3 months ago
2010
The OpenFlow framework enables flow-level control over Ethernet switching, as well as centralized visibility of the flows in the network. OpenFlow's coupling of these feature...