681 search results - page 32 / 137 » Architecture and Implementation of PIM m |
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper describes a Hybrid DFT (H-DFT) architecture for low-cost, high quality structural testing in the high volume manufacturing (HVM) environment. This structure efficiently...
IADIS
2003
13 years 11 months ago
2003
With the consolidation of the Internet and other computer networks, the need of sophisticated systems to retrieve information increased enormously. In these networks, information ...
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract—This paper presents a method to investigate powerperformance tradeoffs in digital pipelined designs. The method is applied at the architectural level of the design. It w...
ISCAS
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper proposes a low power commutator architecture based on triple port RAMs rather than dual port RAMs or conventional FIFO.forthe radix-4 pipelined FFTprocessor implementat...
DSN
2002
IEEE
14 years 2 months ago
2002
IEEE
The architecture and implementation of the LEON-FT processor is presented. LEON-FT is a fault-tolerant 32-bit processor based on the SPARC V8 instruction set. The processors toler...