114 search results - page 15 / 23 » Architecture and synthesis for multi-cycle communication |
ASAP
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we present and analyze a novel decoder architecture for LDPC convolutional codes (LDPCCCs). The proposed architecture enables high throughput and can be programmed ...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
For multi-gigahertz synchronous designs in nanometer technologies, multiple clock cycles are needed to cross the global interconnects, thus making it necessary to have pipelined g...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
A formal synthesis method for complex real-time embedded software is proposed in this work. Compared to previous work, our method not only synthesizes embedded software with compl...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
At runtime, an embedded control system can switch between alternative functional modes. In each mode, the system operates by using a schedule and controllers that exploit the avai...
VLSID
2008
IEEE
14 years 8 months ago
2008
IEEE
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...