134 search results - page 11 / 27 » Architecture driven circuit partitioning |
DAC
1997
ACM
14 years 2 hour ago
1997
ACM
In this paper, we present a new hypergraph partitioning algorithm that is based on the multilevel paradigm. In the multilevel paradigm, a sequence of successively coarser hypergra...
DAC
1995
ACM
13 years 11 months ago
1995
ACM
—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new Steiner and arborescence FPGA routing algorithms. Our Steiner tree constructions signiï...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
Blue Gene R /P is a massively parallel supercomputer intended as the successor to Blue Gene/L. It leverages much of the existing architecture of its predecessor to provide scalabi...