Sciweavers

134 search results - page 12 / 27
» Architecture driven circuit partitioning
Sort
View
DAC
2007
ACM
14 years 8 months ago
Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
Ümit Y. Ogras, Diana Marculescu, Puru Choudha...
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 8 months ago
Register Transfer Operation Analysis during Data Path Verification
A control part ? data path partition based sequential circuit verification scheme aimed at avoiding state explosion comprises two major modules namely, a data path verifier and a ...
D. Sarkar
APCSAC
2005
IEEE
14 years 1 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi
CORR
2008
Springer
107views Education» more  CORR 2008»
13 years 8 months ago
Optimization and AMS Modeling for Design of an Electrostatic Vibration Energy Harvester's Conditioning Circuit with an Auto-Adap
This paper presents an analysis and system-level design of a capacitive harvester of vibration energy composed from a mechanical resonator, capacitive transducer and a conditioning...
Dimitri Galayko, Philippe Basset, Ayyaz Mahmood Pa...
ISLPED
2004
ACM
169views Hardware» more  ISLPED 2004»
14 years 1 months ago
Delay optimal low-power circuit clustering for FPGAs with dual supply voltages
This paper presents a delay optimal FPGA clustering algorithm targeting low power. We assume that the configurable logic blocks of the FPGA can be programmed using either a high s...
Deming Chen, Jason Cong