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» Architectures for function evaluation on FPGAs
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FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
14 years 1 months ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith
FSKD
2005
Springer
77views Fuzzy Logic» more  FSKD 2005»
14 years 3 months ago
Knowledge Structuring and Evaluation Based on Grey Theory
It is important nowadays to provide guidance for individuals or organizations to improve their knowledge according to their objectives, especially in the case of incomplete cogniti...
Chen Huang, Yushun Fan
FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
14 years 4 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
ISSS
1998
IEEE
120views Hardware» more  ISSS 1998»
14 years 2 months ago
Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
Ing-Jer Huang, Ping-Huei Xie
OTM
2009
Springer
14 years 4 months ago
Evaluating Throughput Stability of Protocols for Distributed Middleware
Communication of large data volumes is a core functionality of distributed systems middleware, namely, for interconnecting components, for distributed computation and for fault tol...
Nuno Carvalho, José P. Oliveira, José...