643 search results - page 50 / 129 » Architectures for function evaluation on FPGAs |
ICCD
2007
IEEE
14 years 7 months ago
2007
IEEE
Hybrid nanoelectronics are emerging as one viable option to sustain the Moore’s Law after the CMOS scaling limit is reached. One main design challenge in hybrid nanoelectronics ...
DATE
2005
IEEE
14 years 4 days ago
2005
IEEE
In this paper, we provide a methodology to perform both bus partitioning and bus frequency assignment to each of the bus segment simultaneously while optimizing both power consump...
IDA
2009
Springer
14 years 4 months ago
2009
Springer
Abstract Deciding which computer architecture provides the best performance for a certain program is an important problem in hardware design and benchmarking. While previous approa...
HPCC
2005
Springer
14 years 3 months ago
2005
Springer
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
IFIP
1993
Springer
14 years 2 months ago
1993
Springer
The Architecture of Integrated Information Systems (ARIS) is a popular framework for integrated process modeling. Previous research analysed ARIS using an ontology developed by Bu...