Sciweavers

643 search results - page 6 / 129
» Architectures for function evaluation on FPGAs
Sort
View
ISVLSI
2005
IEEE
80views VLSI» more  ISVLSI 2005»
14 years 1 months ago
Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs
Mesh interconnect can be efficiently utilized while tree networks encourage the short routing distances. In this paper, we present the property analysis of a cluster-based interc...
Renqiu Huang, Ranga Vemuri
ICCAD
2005
IEEE
106views Hardware» more  ICCAD 2005»
14 years 4 months ago
FPGA device and architecture evaluation considering process variations
Process variations in nanometer technologies are becoming an important issue for cutting-edge FPGAs with a multimillion gate capacity. Considering both die-to-die and withindie va...
Ho-Yan Wong, Lerong Cheng, Yan Lin, Lei He
FPL
2006
Springer
132views Hardware» more  FPL 2006»
13 years 11 months ago
Adaptive FPGAs: High-Level Architecture and a Synthesis Method
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
Valavan Manohararajah, Stephen Dean Brown, Zvonko ...
FPGA
2008
ACM
136views FPGA» more  FPGA 2008»
13 years 9 months ago
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs
Functional full-system simulators are powerful and versatile research tools for accelerating architectural exploration and advanced software development. Their main shortcoming is...
Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Bab...
TVLSI
2010
13 years 2 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan