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» Architectures for function evaluation on FPGAs
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FCCM
2006
IEEE
120views VLSI» more  FCCM 2006»
14 years 1 months ago
FPGAs, GPUs and the PS2 - A Single Programming Methodology
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
DAC
2004
ACM
14 years 8 months ago
Efficient on-line testing of FPGAs with provable diagnosabilities
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
Vinay Verma, Shantanu Dutt, Vishal Suthar
FCCM
1998
IEEE
170views VLSI» more  FCCM 1998»
13 years 12 months ago
Characterization and Parameterization of a Pipeline Reconfigurable FPGA
ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
Matthew Moe, Herman Schmit, Seth Copen Goldstein
PROCEDIA
2010
138views more  PROCEDIA 2010»
13 years 2 months ago
Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics
Currently several computational problems require high processing power to handle huge amounts of data, although underlying core algorithms appear to be rather simple. Especially i...
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Car...
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 4 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...