As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
We apply Amdahl's Law to multicore chips using symmetric cores, asymmetric cores, and dynamic techniques that allows cores to work together on sequential execution. To Amdahl...
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
In this paper we describe IPSS (Integrated Planning and Scheduling System), a domain independent solver that integrates an AI heuristic planner, that synthesizes courses of actions...