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    DAC
    1994
    ACM
    109views Computer Architecture» more  DAC 1994»
    A Modular Partitioning Approach for Asynchronous Circuit Synthesis
    13 years 11 months ago
    A Modular Partitioning Approach for Asynchronous Circuit Synthesis
    Download  www.cs.york.ac.uk
    Asynchronous circuits are crucial in designing low power and high performance digital systems. In this paper, we present an ecient modular partitioning approach for asynchronous c...
    Ruchir Puri, Jun Gu
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    ETS
    2006
    IEEE
    108views Hardware» more  ETS 2006»
    A DFT Architecture for Asynchronous Networks-on-Chip
    14 years 1 months ago
    A DFT Architecture for Asynchronous Networks-on-Chip
    Download  hal.archives-ouvertes.fr
    The Networks-on-Chip (NoCs) paradigm is emerging as a solution for the communication of SoCs. Many NoC architecture propositions are presented but few works on testing these netwo...
    Xuan-Tu Tran, Jean Durupt, François Bertran...
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    IEEEPACT
    1999
    IEEE
    91views Distributed And Parallel Com...» more  IEEEPACT 1999»
    A Fully Asynchronous Superscalar Architecture
    13 years 11 months ago
    A Fully Asynchronous Superscalar Architecture
    Download  www.dcs.ed.ac.uk
    An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwardi...
    D. K. Arvind, Robert D. Mullins
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    DAC
    1999
    ACM
    118views Computer Architecture» more  DAC 1999»
    Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style
    13 years 11 months ago
    Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style
    Download  www.cecs.uci.edu
    Ahmed Hemani, Thomas Meincke, Shashi Kumar, Adam P...
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    DAC
    2002
    ACM
    123views Computer Architecture» more  DAC 2002»
    Implementing asynchronous circuits using a conventional EDA tool-flow
    14 years 8 months ago
    Implementing asynchronous circuits using a conventional EDA tool-flow
    Download  www.bcim.lsbu.ac.uk
    Christos P. Sotiriou
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