65 search results - page 3 / 13 » Automated Bus Generation for Multiprocessor SoC Design |
DATE
2003
IEEE
14 years 11 days ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
VLSID
2003
IEEE
14 years 7 months ago
2003
IEEE
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...
FPL
2006
Springer
13 years 10 months ago
2006
Springer
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...