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» Automated Composition of Hardware Components
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ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 11 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
ECBS
2007
IEEE
119views Hardware» more  ECBS 2007»
14 years 1 months ago
Diagnosis of Embedded Software Using Program Spectra
Automated diagnosis of errors detected during software testing can improve the efficiency of the debugging process, and can thus help to make software more reliable. In this pape...
Peter Zoeteweij, Rui Abreu, Rob Golsteijn, Arjan J...
FIRBPERF
2005
IEEE
235views Algorithms» more  FIRBPERF 2005»
14 years 1 months ago
Performance Model Building of Pervasive Computing
Performance model building is essential to predict the ability of an application to satisfy given levels of performance or to support the search for viable alternatives. Using aut...
Andrea D'Ambrogio, Giuseppe Iazeolla
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
14 years 1 months ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh
ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
13 years 11 months ago
A Methodology for Verifying Memory Access Protocols in Behavioral Synthesis
— Memory is one of the most important components to be optimized in the several phases of the synthesis process. ioral synthesis, a memory is viewed as an abstract construct whic...
Gernot Koch, Taewhan Kim, Reiner Genevriere