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DAC
2009
ACM
14 years 10 months ago
Online cache state dumping for processor debug
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishna...
DAC
2008
ACM
14 years 10 months ago
Analysis and implications of parasitic and screening effects on the high-frequency/RF performance of tunneling-carbon nanotube F
Intrinsic and parasitic capacitances play an important role in determining the high?frequency RF performance of devices. Recently, a new type of carbon nanotube field effect trans...
Chaitanya Kshirsagar, Mohamed N. El-Zeftawi, Kaust...
DAC
2008
ACM
14 years 10 months ago
DeFer: deferred decision making enabled fixed-outline floorplanner
In this paper, we present DeFer -- a fast, high-quality and nonstochastic fixed-outline floorplanning algorithm. DeFer generates a non-slicing floorplan by compacting a slicing fl...
Jackey Z. Yan, Chris Chu
DAC
2007
ACM
14 years 10 months ago
IPR: An Integrated Placement and Routing Algorithm
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
Min Pan, Chris C. N. Chu
DAC
2002
ACM
14 years 10 months ago
ILP-based engineering change
We have developed a generic integer linear programming(ILP)based engineering change(EC) methodology. The EC methodology has three components: enabling, fast, and preserving. Enabl...
Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng...