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Publication
Within-die process variations arise during integrated circuit (IC) fabrication in the sub-100nm regime. These variations are of paramount concern as they deviate the performance of...
137
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DAC
2006
ACM
16 years 4 months ago
2006
ACM
The gain-based technology mapping paradigm has been successfully employed for finding minimum delay and minimum area mappings. However, existing gain-based technology mappers fail...
115
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DAC
2006
ACM
16 years 4 months ago
2006
ACM
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vul...
101
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DAC
1998
ACM
16 years 4 months ago
1998
ACM
In this paper we present a statistical method for estimating the maximum power consumption in VLSI circuits. The method is based on the theory of extreme order statistics applied ...
156
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GECCO
2008
Springer
15 years 4 months ago
2008
Springer
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...