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SBCCI
2006
ACM
126views VLSI» more  SBCCI 2006»
14 years 3 months ago
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
TVLSI
2008
140views more  TVLSI 2008»
13 years 9 months ago
A Novel Mutation-Based Validation Paradigm for High-Level Hardware Descriptions
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
Jorge Campos, Hussain Al-Asaad
DAC
2007
ACM
14 years 10 months ago
Parameterized Macromodeling for Analog System-Level Design Exploration
In this paper we propose a novel parameterized macromodeling technique for analog circuits. Unlike traditional macromodels that are only extracted for a small variation space, our...
Jian Wang, Xin Li, Lawrence T. Pileggi
DAC
2002
ACM
14 years 10 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
HICSS
2009
IEEE
177views Biometrics» more  HICSS 2009»
14 years 4 months ago
Intelligent Alarm Processing: From Data Intensive to Information Rich
The requirement for power system operators to respond more efficiently to the stressed power system conditions that may create large number of alarms asks fort advanced alarm proc...
Mladen Kezunovic, Yufan Guan