338 search results - page 44 / 68 » Automated Performance Prediction of Message-Passing Parallel... |
135
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MICRO
2007
IEEE
15 years 8 months ago
2007
IEEE
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
133
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CASES
2007
ACM
15 years 6 months ago
2007
ACM
Many MPSoC applications are loop-intensive and amenable to automatic parallelization with suitable compiler support. One of the key components of any compiler-parallelized code is...
114
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CISIS
2008
IEEE
15 years 4 months ago
2008
IEEE
While memory-safe and type-safe languages have been available for many years, the vast majority of software is still implemented in type-unsafe languages such as C/C++. Despite ma...
160
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JPDC
2006
15 years 2 months ago
2006
Irregular parallel algorithms pose a significant challenge for achieving high performance because of the difficulty predicting memory access patterns or execution paths. Within an...
117
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ISHPC
2000
Springer
15 years 5 months ago
2000
Springer
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...