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FPL
2007
Springer
14 years 2 months ago
2007
Springer
Designers of FPGA-based systems are increasingly including soft processors—processors implemented in programmable logic—in their designs. Any combination of area, clock freque...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Wire pipelining has been proposed as a viable mean to break the discrepancy between decreasing gate delays and increasing wire delays in deep-submicron technologies. Far from bein...
LPAR
2005
Springer
14 years 1 months ago
2005
Springer
Separation logic is a subset of the quantifier-free first order logic. It has been successfully used in the automated verification of systems that have large (or unbounded) inte...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
EGC
2005
Springer
14 years 1 months ago
2005
Springer
Quantitative Structure Activity/Property Relationship (QSAR/QSPR) model development is a complex and time-consuming procedure involving data gathering and preparation. It plays an ...