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ISQED
2006
IEEE
78views Hardware» more  ISQED 2006»
14 years 2 months ago
Simultaneous Statistical Delay and Slew Optimization for Interconnect Pipelines
Process variation has become a major concern in the design of many nanometer circuits, including interconnect pipelines. This paper develops closed-form models to predict the dela...
Andrew Havlir, David Z. Pan
EDBT
1992
ACM
111views Database» more  EDBT 1992»
13 years 11 months ago
Pipelined Query Processing in the DBGraph Storage Model
The DBGraph storage model, designed for main memory DBMS, ensures both data storage compactness and efficient processing for all database operations. By representing the entire da...
Philippe Pucheral, Jean-Marc Thévenin
TVLSI
1998
99views more  TVLSI 1998»
13 years 7 months ago
Some experiments about wave pipelining on FPGA's
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...
Eduardo I. Boemo, Sergio López-Buedo, Juan ...
ICCD
2005
IEEE
121views Hardware» more  ICCD 2005»
14 years 5 months ago
Asynchronous IC Interconnect Network Design and Implementation Using a Standard ASIC Flow
The implementation of interconnect is becoming a significant challenge in modern IC design. Both synchronous and asynchronous strategies have been suggested to manage this problem...
Bradley R. Quinton, Mark R. Greenstreet, Steven J....
ICCAD
2008
IEEE
150views Hardware» more  ICCAD 2008»
14 years 5 months ago
Performance estimation and slack matching for pipelined asynchronous architectures with choice
— This paper presents a fast analytical method for estimating the throughput of pipelined asynchronous systems, and then applies that method to develop a fast solution to the pro...
Gennette Gill, Vishal Gupta, Montek Singh