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DAC
2005
ACM
16 years 4 months ago
Device and architecture co-optimization for FPGA power reduction
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
103
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DAC
2005
ACM
16 years 4 months ago
Locality-conscious workload assignment for array-based computations in MPSOC architectures
While the past research discussed several advantages of multiprocessor-system-on-a-chip (MPSOC) architectures from both area utilization and design verification perspectives over ...
Feihui Li, Mahmut T. Kandemir
DAC
2005
ACM
16 years 4 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng
DAC
2006
ACM
16 years 4 months ago
Prediction-based flow control for network-on-chip traffic
Networks-on-Chip (NoC) architectures provide a scalable solution to on-chip communication problem but the bandwidth offered by NoCs can be utilized efficiently only in presence of...
Ümit Y. Ogras, Radu Marculescu
DAC
2006
ACM
16 years 4 months ago
Rapid and low-cost context-switch through embedded processor customization for real-time and control applications
In this paper, we present a methodology for low-cost and rapid context switch for multithreaded embedded processors with realtime guarantees. Context-switch, which involves saving...
Xiangrong Zhou, Peter Petrov