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DAC
2009
ACM
14 years 10 months ago
Spare-cell-aware multilevel analytical placement
Post-silicon validation has recently drawn designers' attention due to its increasing impacts on the VLSI design cycle and cost. One key feature of the post-silicon validatio...
Zhe-Wei Jiang, Meng-Kai Hsu, Yao-Wen Chang, Kai-Yu...
DAC
1999
ACM
14 years 10 months ago
Engineering Change: Methodology and Applications to Behavioral and System Synthesis
Due to the unavoidable need for system debugging, performance tuning, and adaptation to new standards, the engineering change (EC) methodology has emerged as one of the crucial co...
Darko Kirovski, Miodrag Potkonjak
DAC
2002
ACM
14 years 10 months ago
Hole analysis for functional coverage data
One of the main goals of coverage tools is to provide the user with informative presentation of coverage information. Specifically, information on large, cohesive sets of uncovere...
Oded Lachish, Eitan Marcus, Shmuel Ur, Avi Ziv
DAC
2005
ACM
14 years 10 months ago
Simulation based deadlock analysis for system level designs
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. S...
ICSE
2008
IEEE-ACM
14 years 10 months ago
Incremental state-space exploration for programs with dynamically allocated data
We present a novel technique that speeds up state-space exploration (SSE) for evolving programs with dynamically allocated data. SSE is the essence of explicit-state model checkin...
Steven Lauterburg, Ahmed Sobeih, Darko Marinov, Ma...