557 search results - page 3 / 112 » Automatic Abstraction for Verification of Timed Circuits and... |
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper presents an innovative approach for analogue and mixed-signal verification. It consists in a “verification kit” that makes use of concepts used in state-of-art digi...
ASYNC
2002
IEEE
14 years 2 months ago
2002
IEEE
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
DAC
2008
ACM
14 years 10 months ago
2008
ACM
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
CJ
2010
13 years 10 months ago
2010
rder logic (HOL) theorem prover. The high ability of abstraction in the HOL verification system allows its use for the verification task over the whole design path of the circuit, ...