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EVOW
2001
Springer
14 years 1 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
ICCD
2008
IEEE
221views Hardware» more  ICCD 2008»
14 years 5 months ago
Reversi: Post-silicon validation system for modern microprocessors
— Verification remains an integral and crucial phase of today’s microprocessor design and manufacturing process. Unfortunately, with soaring design complexities and decreasing...
Ilya Wagner, Valeria Bertacco
ICSE
2008
IEEE-ACM
14 years 9 months ago
LISABETH: automated content-based signature generator for zero-day polymorphic worms
Modern worms can spread so quickly that any countermeasure based on human reaction might not be fast enough. Recent research has focused on devising algorithms to automatically pr...
Lorenzo Cavallaro, Andrea Lanzi, Luca Mayer, Matti...
HPCA
2006
IEEE
14 years 9 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
SIPS
2006
IEEE
14 years 2 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...