179 search results - page 13 / 36 » Automatic High Level Assertion Generation and Synthesis for ... |
DAC
2012
ACM
11 years 10 months ago
2012
ACM
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
With the increasing complexity and heterogeneity of embedded electronic systems, a unified design methodology at evels of abstraction becomes a necessity. Meanwhile, it is also i...
GLVLSI
2008
IEEE
14 years 1 months ago
2008
IEEE
Due to the increasing complexity of today’s embedded systems, the analysis and validation of such systems is becoming a major challenge. UML is gradually adopted in the embedded...
GECCO
2004
Springer
14 years 27 days ago
2004
Springer
Abstract. The need for effective testing techniques for architectural level descriptions is widely recognised. However, due to the variety of domain-specific architectural descript...
FMAM
2010
13 years 5 months ago
2010
: In this paper, we present the experience gained with the participation in a case study in which a novel high-level design language (UML4SOA) was used to produce a service-oriente...