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» Automatic Model Refinement for Fast Architecture Exploration
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DAC
1999
ACM
14 years 28 days ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
ASM
2008
ASM
13 years 10 months ago
Using EventB to Create a Virtual Machine Instruction Set Architecture
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
Stephen Wright
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
14 years 19 days ago
Software Performance Estimation in MPSoC Design
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
Márcio Oyamada, Flávio Rech Wagner, ...
DAC
2002
ACM
14 years 9 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...
IJES
2008
101views more  IJES 2008»
13 years 8 months ago
The Artemis workbench for system-level performance evaluation of embedded systems
In this article, we present an overview of the Artemis workbench, which provides modelling and simulation methods and tools for efficient performance evaluation and exploration of ...
Andy D. Pimentel