Sciweavers

86 search results - page 8 / 18
» Automatic Synthesis of Sequential Synchronizations
Sort
View
FSTTCS
2005
Springer
14 years 1 months ago
The MSO Theory of Connectedly Communicating Processes
Abstract. We identify a network of sequential processes that communicate by synchronizing frequently on common actions. More precisely, we demand that there is a bound k such that ...
P. Madhusudan, P. S. Thiagarajan, Shaofa Yang
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
14 years 26 days ago
Recursion-driven parallel code generation for multi-core platforms
—We present Huckleberry, a tool for automatically generating parallel implementations for multi-core platforms from sequential recursive divide-and-conquer programs. The recursiv...
Rebecca L. Collins, Bharadwaj Vellore, Luca P. Car...
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
14 years 1 months ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh
ET
2007
111views more  ET 2007»
13 years 7 months ago
Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware
This article describes an emulation-based method for locating stuck-at faults in combinational and synchronous sequential circuits. The method is based on automatically designing a...
Fatih Kocan, Daniel G. Saab
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 4 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna