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» Automatic Verification of Timed Circuits
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FMCAD
2008
Springer
13 years 11 months ago
Verifying an Arbiter Circuit
Abstract--This paper presents the verification of an asynchronous arbiter modeled at the circuit level with non-linear ordinary differential equations. We use Brockett's annul...
Chao Yan, Mark R. Greenstreet
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 4 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
CSREAESA
2004
13 years 11 months ago
Automatic Extraction of Non-Iterated System Behavior from Verilog Specifications
In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...
Lubomir Ivanov
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 10 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
TCAD
2002
146views more  TCAD 2002»
13 years 9 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier