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ICCAD
1996
IEEE
133views Hardware» more  ICCAD 1996»
13 years 11 months ago
Basic concepts for an HDL reverse engineering tool-set
Designer's productivity has become the key-factor of the development of electronic systems. An increasing application of design data reuse is widely recognized as a promising...
Gunther Lehmann, Bernhard Wunder, Klaus D. Mü...
CODES
2005
IEEE
14 years 29 days ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
ICECCS
2009
IEEE
161views Hardware» more  ICECCS 2009»
14 years 2 months ago
Formal Modelling and Analysis of Business Information Applications with Fault Tolerant Middleware
Distributed information systems are critical to the functioning of many businesses; designing them to be dependable is a challenging but important task. We report our experience i...
Jeremy Bryans, John S. Fitzgerald, Alexander Roman...
IWMM
2000
Springer
84views Hardware» more  IWMM 2000»
13 years 11 months ago
Designing a Trace Format for Heap Allocation Events
Dynamic storage allocation continues to play an important role in the performance and correctness of systems ranging from user productivity software to high-performance servers. W...
Trishul M. Chilimbi, Richard E. Jones, Benjamin G....
CODES
2006
IEEE
14 years 1 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...