302 search results - page 9 / 61 » Automatic microarchitectural pipelining |
MICRO
1999
IEEE
14 years 2 months ago
1999
IEEE
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
ISCA
2003
IEEE
14 years 3 months ago
2003
IEEE
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...
ISCA
2005
IEEE
14 years 3 months ago
2005
IEEE
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
- Technology scaling and sub-wavelength optical lithography is associated with significant process variations. We propose a self-adaptive variable supply-voltage scaling (SAVS) tec...
HPCA
2001
IEEE
14 years 10 months ago
2001
IEEE
This paper introduces a router delay model that accurately models key aspects of modern routers. The model accounts for the pipelined nature of contemporary routers, the specific ...