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SBACPAD
2006
IEEE
102views Hardware» more  SBACPAD 2006»
14 years 1 months ago
Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach
Performance evaluation of contemporary processors is becoming increasingly difficult due to the lack of proper frameworks. Traditionally, cycle-accurate simulators have been exte...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
VLSID
2005
IEEE
167views VLSI» more  VLSID 2005»
14 years 7 months ago
A Methodology and Tooling Enabling Application Specific Processor Design
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...
MICRO
2002
IEEE
100views Hardware» more  MICRO 2002»
14 years 10 days ago
Microarchitectural exploration with Liberty
To find the best designs, architects must rapidly simulate many design alternatives and have confidence in the results. Unfortunately, the most prevalent simulator construction ...
Manish Vachharajani, Neil Vachharajani, David A. P...
CODES
2006
IEEE
14 years 1 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...
FPGA
2006
ACM
139views FPGA» more  FPGA 2006»
13 years 11 months ago
Fast and accurate resource estimation of automatically generated custom DFT IP cores
This paper presents an equation-based resource utilization model for automatically generated discrete Fourier transform (DFT) soft core IPs. The parameterized DFT IP generator all...
Peter A. Milder, Mohammad Ahmad, James C. Hoe, Mar...