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DAC
2008
ACM
14 years 9 months ago
Formal datapath representation and manipulation for implementing DSP transforms
We present a domain-specific approach to representing datapaths for hardware implementations of linear signal transform algorithms. We extend the tensor structure for describing l...
Franz Franchetti, James C. Hoe, Markus Püsche...
GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
CODES
2005
IEEE
14 years 2 months ago
Shift buffering technique for automatic code synthesis from synchronous dataflow graphs
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
Hyunok Oh, Nikil D. Dutt, Soonhoi Ha
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
14 years 24 days ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling
ICCAD
1998
IEEE
109views Hardware» more  ICCAD 1998»
14 years 24 days ago
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Field programmable gate arrays (FPGAs) are commonly used in embedded systems. Although it is possible to reconfigure some FPGAs while an embedded system is operational, this featu...
Robert P. Dick, Niraj K. Jha