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» Automating commutativity analysis at the design level
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KBSE
2005
IEEE
14 years 1 months ago
Determining the cost-quality trade-off for automated software traceability
Major software development standards mandate the establishment of trace links among software artifacts such as requirements, architectural elements, or source code without explici...
Alexander Egyed, Stefan Biffl, Matthias Heindl, Pa...
DAC
2006
ACM
14 years 8 months ago
GreenBus: a generic interconnect fabric for transaction level modelling
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...
Wolfgang Klingauf, Robert Günzel, Oliver Brin...
DATE
2005
IEEE
164views Hardware» more  DATE 2005»
14 years 1 months ago
Automated Synthesis of Assertion Monitors using Visual Specifications
Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...
Ambar A. Gadkari, S. Ramesh
DAC
2002
ACM
14 years 8 months ago
Timed compiled-code simulation of embedded software for performance analysis of SOC design
In this paper, a new timing generation method is proposed for the performance analysis of embedded software. The time stamp generation of I/O accesses is crucial to performance es...
Jong-Yeol Lee, In-Cheol Park
SIGSOFT
2003
ACM
14 years 8 months ago
Towards scalable compositional analysis by refactoring design models
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
Yung-Pin Cheng, Michal Young, Che-Ling Huang, Chia...