Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
This paper describes an inter-procedural technique for computing symbolic bounds on the number of statements a procedure executes in terms of its scalar inputs and user-defined qu...
Sumit Gulwani, Krishna K. Mehra, Trishul M. Chilim...
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Contact lens wearers are often affected by a condition known as conjuctival hyperaemia. This condition is characterised by dilated blood vessels visible in the sclera (the white p...
Janine Cullen, Paul W. Fieguth, Shane Pounder, Kim...
A low power passive equalizer using RL terminator is proposed and optimized in this work. The equalizer includes an inductor in series with the resistive terminator, which boosts ...