37 search results - page 6 / 8 » BDD-based synthesis of reversible logic for large functions |
ASPDAC
2004
ACM
14 years 26 days ago
2004
ACM
— Reducing the ever-growing leakage power is critical to power efficient designs. Leakage reduction techniques such as power-gating using sleep transistor insertion introduces la...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
— Reduced ordered Binary Decision Diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synt...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
In this paper, we revisit the classical problem of functional decomposition [1, 2] that arises so often in logic synthesis. One basic problem that has remained largely unaddressed...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
In some cases, minimum Sum-Of-Products (SOP) expressions of Boolean functions can be derived by detecting decomposition and observing the functional properties such as unateness, ...