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ICCAD
2003
IEEE
161views Hardware» more  ICCAD 2003»
14 years 4 months ago
A General S-Domain Hierarchical Network Reduction Algorithm
This paper presents an efficient method to reduce complexities of a linear network in s-domain. The new method works on circuit matrices directly and reduces the circuit complexi...
Sheldon X.-D. Tan
ASAP
2004
IEEE
141views Hardware» more  ASAP 2004»
13 years 11 months ago
Evaluating Instruction Set Extensions for Fast Arithmetic on Binary Finite Fields
Binary finite fields GF(2n ) are very commonly used in cryptography, particularly in publickey algorithms such as Elliptic Curve Cryptography (ECC). On word-oriented programmable ...
A. Murat Fiskiran, Ruby B. Lee
ICC
2007
IEEE
14 years 1 months ago
Low-Complexity EM-based Joint CFO and IQ imbalance Acquisition
—New air interfaces are currently being developed to meet the high spectral efficiency requirements of the emerging wireless communication systems. In this context, OFDM is cons...
François Horlin, André Bourdoux, Edu...
ICCAD
1998
IEEE
76views Hardware» more  ICCAD 1998»
13 years 11 months ago
Functional debugging of systems-on-chip
Due to the exponential growth of both design complexity and the number of gates per pin, functional debugging has emerged as a critical step in the development of a system-on-chip...
Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
14 years 1 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...