Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...
We present new techniques for interactive cinematic lighting design of complex scenes that use procedural shaders. Deep-framebuffers are used to store the geometric and optical in...
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...