233 search results - page 22 / 47 » Balance Testing of Logic Circuits |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Intensive research is performed to find post-CMOS technologies. A very promising direction based on reversible logic are quantum computers. While in the domain of reversible lo...
FPGA
1998
ACM
13 years 11 months ago
1998
ACM
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
ICSE
2007
IEEE-ACM
14 years 7 months ago
2007
IEEE-ACM
The Alloy tool-set has been gaining popularity as an alternative to traditional manual testing and checking for design correctness. Alloy uses a first-order relational logic for m...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper presents a new test response compaction technique with any number of unknown logic values (X’s) in the test response bits. The technique leverages an X-tolerant respo...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Recent research results have shown that the traditional structural testing for delay and crosstalk faults may result in over-testing due to the non-trivial number of such faults t...