271 search results - page 19 / 55 » Bandwidth-Friendly Cache Hierarchy |
PE
2010
Springer
13 years 4 months ago
2010
Springer
Accurately characterizing the resource usage of an application at various levels in the memory hierarchy has been a long-standing research problem. Existing characterization studi...
ICCD
2004
IEEE
14 years 6 months ago
2004
IEEE
Simultaneous Multithreading (SMT) is emerging as an effective microarchitecture model to increase the utilization of resources in modern super-scalar processors. However, co-sched...
ICCD
2008
IEEE
14 years 6 months ago
2008
IEEE
— Recent studies indicate that a considerable amount of an L2 cache leakage power is dissipated in its peripheral circuits, e.g., decoders, word-lines and I/O drivers. In additio...
DATE
2004
IEEE
14 years 1 months ago
2004
IEEE
The power consumed by the memory hierarchy of a microprocessor can contribute to as much as 50% of the total microprocessor system power, and is thus a good candidate for optimiza...
CASES
2005
ACM
13 years 12 months ago
2005
ACM
Horizontally partitioned data caches are a popular architectural feature in which the processor maintains two or more data caches at the same level of hierarchy. Horizontally part...