130 search results - page 23 / 26 » Battery-Powered Digital CMOS Design |
ISLPED
2009
ACM
14 years 4 months ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for about 40% or more of the total energy consumed in t...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
—A novel clock and data recovery architecture with adaptive loop gain is proposed for spread spectrum SerDes applications such as the Serial AT Attachment. The proposed design co...
GLVLSI
2003
IEEE
14 years 3 months ago
2003
IEEE
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
CSREAESA
2004
13 years 11 months ago
2004
To perform digital logic in CMOS in a truly adiabatic (asymptotically thermodynamically reversible) fashion requires that logic transitions be driven by a quasitrapezoidal (flat-t...