436 search results - page 26 / 88 » Benchmarking and hardware implementation of JPEG-LS |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper, we propose two FPGA-area allocation algorithms based on profiling results for reducing the impact on performance of dynamic reconfiguration overheads. The problem o...
FCCM
2011
IEEE
13 years 1 months ago
2011
IEEE
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
ASPLOS
2006
ACM
14 years 3 months ago
2006
ACM
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
—This paper explores the use of dynamic compilation for continuing execution even if one or more of the memory banks used by an application become temporarily unavailable (but th...
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...