436 search results - page 53 / 88 » Benchmarking and hardware implementation of JPEG-LS |
MTDT
1999
IEEE
13 years 12 months ago
1999
IEEE
The new concept of an unbalanced, hierarchicallydivided cache memory system is introduced and analyzed. This approach generalizes existing cache structures by allowing different m...
FPL
1999
Springer
13 years 12 months ago
1999
Springer
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
ISCA
1998
IEEE
13 years 12 months ago
1998
IEEE
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
ICCAD
1997
IEEE
13 years 12 months ago
1997
IEEE
We present a new matrix formulation of the face hypercube embedding problem that motivates the design of an efficient search strategy to find an encoding that satisfies all fac...
VTS
1997
IEEE
13 years 12 months ago
1997
IEEE
We address the problem of rectifying an incorrect combinational circuit against a given specification. Based on the symbolic BDD techniques, we consider the rectification process,...