436 search results - page 76 / 88 » Benchmarking and hardware implementation of JPEG-LS |
MICRO
2008
IEEE
14 years 2 months ago
2008
IEEE
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
ESTIMEDIA
2007
Springer
14 years 1 months ago
2007
Springer
—Modern compression standards such as H.264, DivX, or VC-1 provide astonishing quality at the costs of steadily increasing processing requirements. Therefore, efficient solution...
FPGA
2007
ACM
14 years 1 months ago
2007
ACM
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
ASPDAC
2005
ACM
14 years 1 months ago
2005
ACM
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...