Temperature and radiation tolerant electronics, as well as long life survivability are key capabilities required for future NASA missions. Current approaches to electronics for ext...
Didier Keymeulen, Ricardo Salem Zebulum, Vu Duong,...
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
An ant deposits pheromone along the path that it travels and is more likely to choose a path with a higher concentration of pheromone. The sensing and dropping of pheromone makes ...
Sameena Shah, Ravi Kothari, Jayadeva, Suresh Chand...
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...