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» Bounded-lifetime integrated circuits
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DATE
1999
IEEE
91views Hardware» more  DATE 1999»
15 years 9 months ago
Path Delay Fault Testing of ICs with Embedded Intellectual Property Blocks
In this paper we show that the already known method of using multiplexers for making the inputs and outputs of the embedded blocks accessible by the primary ports of the Integrate...
Dimitris Nikolos, Haridimos T. Vergos, Th. Haniota...
DAC
2007
ACM
16 years 5 months ago
Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency
This paper presents a generalized formulation of the periodic steady-state analysis for oscillators. The new formulation finds the value of a circuit parameter that results in a d...
Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotr...
DAC
1998
ACM
16 years 5 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
120
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ATS
2009
IEEE
138views Hardware» more  ATS 2009»
15 years 11 months ago
Test Pattern Selection for Potentially Harmful Open Defects in Power Distribution Networks
Power distribution network (PDN) designs for today’s high performance integrated circuits (ICs) typically occupy a significant share of metal resources in the circuit, and henc...
Yubin Zhang, Lin Huang, Feng Yuan, Qiang Xu
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
15 years 11 months ago
Trace signal selection for visibility enhancement in post-silicon validation
Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from presilicon verification. One effective silicon debug ...
Xiao Liu, Qiang Xu