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» Bounded-lifetime integrated circuits
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3DIC
2009
IEEE
279views Hardware» more  3DIC 2009»
14 years 3 months ago
Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...
Roshan Weerasekera, Matt Grange, Dinesh Pamunuwa, ...
ASPDAC
2006
ACM
93views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Electrothermal analysis and optimization techniques for nanoscale integrated circuits
Abstract— With technology scaling, on-chip power densities are growing steadily, leading to the point where temperature has become an important consideration in the design of ele...
Yong Zhan, Brent Goplen, Sachin S. Sapatnekar
DATE
2008
IEEE
89views Hardware» more  DATE 2008»
14 years 2 months ago
EPIC: Ending Piracy of Integrated Circuits
As semiconductor manufacturing requires greater capital investments, the use of contract foundries has grown dramatically, increasing exposure to mask theft and unauthorized exces...
Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov
ICTAI
2002
IEEE
14 years 1 months ago
A Genetic Testing Framework for Digital Integrated Circuits
In order to reduce the time-to-market and simplify gatelevel test generation for digital integrated circuits, GAbased functional test generation techniques are proposed for behavi...
Xiaoming Yu, Alessandro Fin, Franco Fummi, Elizabe...
DATE
2008
IEEE
102views Hardware» more  DATE 2008»
14 years 2 months ago
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
Sawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew...