A floorplan represents the relative relations between modules on an integrated circuit. Floorplans are commonly classified as slicing, mosaic, or general. Separable and Baxter per...
In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C pro...
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zh...
This paper studies TSV-to-TSV coupling in 3D ICs. A full-chip SI analysis flow is proposed based on the proposed coupling model. Analysis results show that TSVs cause significan...
Chang Liu, Taigon Song, Jonghyun Cho, Joohee Kim, ...
We develop a projected-subgradient primal-dual Lagrange optimization for global placement, that can be instantiated with a variety of interconnect models. It decomposes the origin...
Integrated Circuit manufacturing complexities have resulted in decreasing product yields and reliabilities. This process has been accelerated with the advent of very deep sub-micr...