Sciweavers

486 search results - page 45 / 98
» Branch Prediction For Free
Sort
View
ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
14 years 18 days ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean
ISCA
2000
IEEE
111views Hardware» more  ISCA 2000»
14 years 1 days ago
Understanding the backward slices of performance degrading instructions
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
Craig B. Zilles, Gurindar S. Sohi
ICS
1989
Tsinghua U.
13 years 11 months ago
Control flow optimization for supercomputer scalar processing
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
Pohua P. Chang, Wen-mei W. Hwu
CASES
2007
ACM
13 years 11 months ago
A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots
Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots,...
Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter
BMCBI
2007
102views more  BMCBI 2007»
13 years 7 months ago
FlexOracle: predicting flexible hinges by identification of stable domains
Background: Protein motions play an essential role in catalysis and protein-ligand interactions, but are difficult to observe directly. A substantial fraction of protein motions i...
Samuel Flores, Mark Gerstein