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» C Based Hardware Design for Wireless Applications
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132
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DATE
2004
IEEE
136views Hardware» more  DATE 2004»
15 years 7 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
ISLPED
1996
ACM
68views Hardware» more  ISLPED 1996»
15 years 8 months ago
Energy-recovery CMOS for highly pipelined DSP designs
We compare the frequency-versus-power dissipation performance of two energy-recovery CMOS implementations to that of a conventional, supply-voltage-scaled design. The application ...
William C. Athas, W.-C. Liu, Lars J. Svensson
119
Voted
CEC
2009
IEEE
15 years 8 months ago
JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator
This paper presents a new unified design flow developed within the Perplexus project that aims to accelerate parallelizable data-intensive applications in the context of ubiquitous...
Olivier Brousse, Jérémie Guillot, Th...
JSA
2010
158views more  JSA 2010»
14 years 11 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
ISQED
2006
IEEE
90views Hardware» more  ISQED 2006»
15 years 10 months ago
Transaction Level Error Susceptibility Model for Bus Based SoC Architectures
System on Chip architectures have traditionally relied upon bus based interconnect for their communication needs. However, increasing bus frequencies and the load on the bus calls...
Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykr...